SCIS Event

Dissertation Defense

Optimizing Main Memory Usage in Modern Computing Systems to Improve Overall System Performance

Date / Time:

Jun. 20, 2016 @ 10:00 am


Florida International University
ECS: 349


Daniel Campello
Florida International University

Daniel Campello


Operating Systems use fast, CPU-addressable main memory to maintain an application’s temporary data as anonymous data and to cache copies of persistent data stored in slower block-based storage devices. However, the use of this faster memory comes at a high cost. Therefore, several techniques have been implemented to use main memory more efficiently in the literature. In this thesis we introduce three distinct approaches to improve overall system performance by optimizing main memory usage.

First, DRAM and host-side caching of file system data are used for speeding up virtual machine performance in today’s virtualized data centers. The clustering of VM images that share identical pages, coupled with data deduplication, has the potential to optimize main memory usage, since it provides more opportunity for sharing resources across processes and across different VMs. In our first approach, we study the use of content and semantic similarity metrics and a new algorithm to cluster VM images and place them in hosts where through deduplication we improve main memory usage.

Second, while careful VM placement can improve memory usage by eliminating duplicate data, caches in current systems employ complex machinery to manage the cached data. Writing data to a page not present in the file system page cache causes the operating system to synchronously fetch the page into memory, blocking the writing process. In this thesis, we address this limitation with a new approach to managing page writes involving buffering the written data elsewhere in memory and unblocking the writing process immediately. This buffering allows the system to service file writes faster and with less memory resources.

In our last approach, we investigate the use of emerging byte-addressable persistent memory technology to extend main memory as a less costly alternative to exclusively using expensive DRAM. We motivate and build a tiered memory system wherein persistent memory and DRAM co-exist and provide improved application performance at lower cost and power consumption by placing the right data in the right memory tier at the right time. The proposed approach seamlessly performs page migration across memory tiers as access patterns change and/or to handle tier memory pressure.


Daniel Campello is a Ph.D candidate in the School of Computing and Information Sciences, at FIU. He is a member of the System Research Lab where he works under the supervision of Dr. Raju Rangaswami. He received his Master's degree in Computer Science from FIU in 2012, and his Bachelor's degree in Computer Engineering from Simon Bolivar University in Caracas, Venezuela in 2009. During his early years, Daniel Campello worked in different laboratories assisting as system administrator. Currently, Daniel's research interest is mostly focused on operating systems, more specifically, on improving performance of storage systems and interfaces for persistent memory. Throughout his studies, Daniel Campello has been awarded various grants and scholarships.